1. Field of the Invention
The present invention relates to a universal asynchronous receiver and transmitter, and more particularly to such a universal asynchronous receiver and transmitter that can minimize a baud rate error that may occur due to differences between systems.
2. Background of the Related Art
A universal asynchronous receiver and transmitter (UART) is a control system that converts bytes of data between the parallel format in which bits are stored side by side within a device and the serial format whereby bits are propagated sequentially over a communication line. As shown in FIG. 1, a UART 6 includes a control circuit 1 generating a control signal indicative of the amount of data transmission, first and second latches 2 and 2' latching higher bits and lower bits of the control signal, and a baud generator 3 for generating a baud rate in response to a control signal produced from the control circuit 1.
The baud generator 3 counts the data latched by latches 2 and 2' and generates transmission and reception clock signals. The UART also includes a receiver 4 having a receive buffer register and a receive first input/first output (FIFO) buffer to interface a remote host to a local host, and a transmitter 5 having a transmit hold register and a transmit FIFO buffer to interface the local host to the remote host.
In asynchronous data transmission, the data comprises a 1-bit start bit, 5- to 8-bit data, a parity bit attached to the data bits, and 1-, 1/2- or 2-bit stop bit. In case of serial data communication between two otherwise incompatible systems, data transmission and reception operations are carried out after making baud clocks of both systems equal to one another by programming the values to be latched in the first and second latches 2 and 2'. The conventional UART accomplishes data communication with the trouble of making baud rates of two incompatible systems equal to each other every time, and with a high probability of a baud rate error due to differences between systems.